In recent years, in order to achieve high breakdown voltage, low loss, and the like in a semiconductor device, silicon carbide has begun to be adopted as a material for the semiconductor device. Silicon carbide has a wide energy bandgap, high melting point, low dielectric constant, high breakdown-field strength, high thermal conductivity, and high saturation electron drift velocity compared to silicon. These characteristics would allow silicon carbide power devices to operate at higher temperatures, higher power levels, and with lower specific on-resistance than conventional silicon based power devices. Such devices must also exhibit low reverse leakage currents. Large reverse leakage currents may cause premature soft breakdown.
Surface passivation is needed for any semiconductor device to protect it from its external environment and for obtaining stable and repeatable electrical characteristics. Without surface passivation, the characteristics of devices such as diodes or rectifiers can be easily influenced by ambient moisture and impurities and thus become unstable.
Conventionally, surface passivation on the silicon carbide surface can be formed by various techniques, such as thermo oxidation, vapor oxide deposition, plasma enhanced vapor deposition, and the like. However, these deposition techniques have to be operated in a high temperature or a plasma excited environment, which may break the Si—C atomic bonds of the silicon carbide, so the C atoms become residues in the dielectric interface, which adversely affects the performance of the Si—C device.
For example, U.S. Pat. No. 5,629531 to Palmour discloses a method of obtaining high quality passivation layers on silicon carbide surfaces by oxidizing a sacrificial layer of a silicon-containing material on a silicon carbide portion of a device structure to substantially consume the sacrificial layer to produce an oxide passivation layer on the silicon carbide portion that is substantially free of dopants that would otherwise degrade the electrical integrity of the oxide layer. However, the oxide passivation layer is deposited onto the silicon carbide surface through a thermo oxidation process that has to be conducted in a high temperature, which may break the Si—C atomic bonds and adversely affects the performance of the Si—C device.
U.S. Pat. No. 6,246,076 to Lipkin et al. discloses a dielectric structure for silicon carbide-based semiconductor devices. In gated devices, the structure includes a layer of silicon carbide, a layer of silicon dioxide on the silicon carbide layer, a layer of another insulating material on the silicon dioxide layer, with the insulating material having a dielectric constant higher than the dielectric constant of silicon dioxide, and a gate contact to the insulating material. In other devices the dielectric structure forms an enhanced passivation layer or field insulator. However, the silicon oxide layer in Lipkin is still deposited onto the silicon carbide surface through a thermo oxidation process that has to be conducted in a high temperature.
Therefore, there remains a need for a new and improved fabrication technique to generate a passivated SiC device without breaking the Si—C atomic bonds to enhance the electrical characteristics and performance of the passivated SiC device.